- on Do 14 Mai 2015
ADC板子设计
- what is ADCLK-positive and negative ?
- why AVDD and LVDD are equiquented with different capacities.?
- FPGA 92,91 - ADCLK+/-
- how to connect the lines of two adc chips to the FPGA board? what is the pin assignment?
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普通模式的电压输出Vcm直接通过一个运放接给全差分运放作为ADC的输入数据。
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Fibre 是什么玩意? 磁珠
- why in the original FPGA design the voltage of ADC input should be transferd to 2.5V , while by Jannik it is 3.3 V to the FPGA? 因为使用的fpga不同,电压不同
- why the Vcom1 and Vcom2 are seperated ? it's the same!