GPIO DIR change limit

GPIO 频率的问题

For the output behavior of GPIO its limit is 25Mhz

And for the input of GPIO, it can be synchronous to system clock.

Besides, I have done a little test to confirm the answer that I get. I put 10 normal instructions between the GPIO instructions. The 10 normal Instr. takes about 100 ns to be executed and takes 11 system cycles to execute. Then I get the sys_clk for the normal instruction is 110Mhz.