GPIO control bugs for 6678L -1

NOTE for gpio control

gpGPIO_regs->BANK_REGISTERS[0].CLR_DATA =(1<<14); // DSP_ACK = 0 and gpGPIO_regs->BANK_REGISTERS[0].CLR_DATA |=(1<<14); // DSP_ACK = 0

are different!

But in the datasheet of TI, it says write a 0 to the CLR or SET register has no influence on the state pin.

However, as i have tested,

the first code will only clear the 14th pin but the seconde code will not only clear 14th pin, but also some other pins, that is the unstable!

conclusion:

Recommandation:

ONLY use gpGPIO_regs->BANK_REGISTERS[0].CLR_DATA |=(1<<14); // DSP_ACK = 0