Design of FPGA-Board(Cyclone3)

1.why the EEPROM are use Bank 5

2. Different IO Banks can suppport different Voltage supply

The Cyclone III architecture supports the MultiVolt I/O interface feature that allows Cyclone III devices to interface with I/O systems that have different supply voltages.

3. The JTAG configuration

the Voltag for the JTAG is corresponding to the Voltage supply of the Bank! Becasue Pin 157 resides in Bank 6.

JTAG-based configuration takes precedence over other configuration schemes, which means the MSEL pin settings are ignored. However, the POR time is dependent on the MSEL pin settings

4. Voltage to the DSP6678L

So we need a regulator to converte the voltage.

5.TPS793xx voltage regulators

6. what is the USE of output clock of ADC chip(ADC_CLOCK and LCLOCK)

内部有PLL，进行倍频作用。